CUDA and GPU programming
- CUDA and GPU programmingArticle
Modal's GPU Glossary: terms for GPU computing
A glossary of GPU-related terms published by Modal. The post shares it as a GPU Glossary reference.
A quick reference for GPU terminology that engineers can use when reading CUDA docs or profiler output.
- CUDA and GPU programmingArticle
Deep Learning Compilers: Architecture, Optimization, and Empirical Characterization
A paper on deep learning compilers, covering their architecture, optimization techniques, and empirical characterization. The linked hgpu.org page describes compilers as key to efficiency on heterogeneous hardware.
Useful for engineers who want a structured view of how DL compilers optimize models across heterogeneous hardware, including GPUs.
- CUDA and GPU programmingArticle
WebGPU Fundamentals: introductory learning site
A post links to WebGPU Fundamentals, a site for learning the WebGPU API. The page preview describes it only as a place to learn WebGPU.
WebGPU is the browser's GPU API, useful for engineers exploring GPU programming beyond CUDA.
PTX ISA 9.5 adds new async copy, fence, and locality instructions
A post highlights new PTX 9.5 features, including narrower async copy waits, aliased-read release fences, locality domain queries, and timestamped trace markers. It links to the PTX ISA 9.5 documentation.
CUDA kernel authors targeting new GPUs need to know these new memory ordering and scheduling primitives.
An Even Easier Introduction to CUDA, by Mark Harris
A step-by-step NVIDIA Technical Blog post introducing CUDA C++ programming for GPUs, using a simple parallel example. The post is an updated version of an earlier introduction.
A short, hands-on starting point for engineers new to writing CUDA C++ kernels.
- CUDA and GPU programmingArticle
Formalizing PTX in Lean to Prove GPU Kernel Correctness
A write-up by the Koska team on formalizing NVIDIA's PTX instruction set in the Lean prover to formally verify GPU kernels. The author says the goal is confidence in agent-written kernels without reading them.
Shows a route to machine-checked correctness for low-level GPU kernels, relevant to verifying generated code.
- 9 days ago @BenKoska
Formalizing PTX in Lean to prove GPU kernels correct
The author says they formalized PTX, NVIDIA's GPU intermediate assembly, in Lean so GPU kernels can be formally proven correct. The post has no linked source yet.
Formal verification of PTX could let teams trust machine-written GPU kernels without manual code review.
- CUDA and GPU programmingArticle
Optimizing a CUDA Matmul Kernel Toward cuBLAS-Level Performance
A worklog by Simon Boehm that iteratively optimizes a CUDA matrix multiplication kernel. The goal is to deepen understanding of GPU performance rather than build a cuBLAS replacement.
A step-by-step walkthrough of how kernel optimizations improve GPU matmul performance.
- 12 days ago @elliotarledge
Beginner-friendly visual intro to how CUDA works
A social post recommends a code-free introduction to CUDA's high-level model, illustrated with dark-theme diagrams. The linked page itself was not included in the item.
Useful for building a mental model of GPU kernel performance before diving into code.
Writing high-performance matmul kernels for Blackwell with Pallas
A JAX documentation page on writing high-performance matrix multiplication kernels for NVIDIA Blackwell GPUs using Pallas. The item is a short post sharing that link.
Shows how to write custom Blackwell GPU matmul kernels in JAX's Pallas, relevant to kernel performance work.
- CUDA and GPU programmingProject
Unlocking FP/BF16 issue rate on Nvidia RTX 3090 via gpu-unlock
A post reports that the gpu-unlock project raised measured PyTorch throughput on an RTX 3090 from 75T to 135T under a 360-watt power wall. The linked GitHub repository describes unlocking FP/BF16 instruction issue rate to professional-card equivalents.
Shows how consumer Nvidia GPU FP/BF16 throughput can differ from professional cards, relevant to ML performance tuning.
- CUDA and GPU programmingArticle
Astral GPU Indexes Add PyTorch 2.13–2.14 and Python 3.15
Astral GPU Indexes now support PyTorch 2.13 and 2.14, and Python 3.15. Updated packages include FlashAttention, FlashAttention 3, causal-conv1d, and DeepSpeed.
Engineers can use pre-built GPU-enabled wheels for these updated packages and runtime versions.
- CUDA and GPU programmingProject
Using symmetric memory for NCCL communication
A section of the Machine Learning Engineering Open Book covers symmetric memory. The post says it was recently added to NCCL and PyTorch and may help with small-to-medium payloads and overlapping communication with compute.
Engineers tuning GPU communication can explore symmetric memory as a potential way to improve communication and compute overlap.
- CUDA and GPU programmingArticle
TIRx Harness for Agentic GPU Kernel Optimization
TIRx Harness is an open compiler harness for agents to explore, debug, and optimize GPU kernels. It includes compiler analysis, a kernel zoo, hardware specifications, and remote GPU evaluation.
Engineers can examine a compiler environment designed for agent-driven kernel development and benchmarking.
- CUDA and GPU programmingArticle
Vx Models Heterogeneous Memory for Compiler Checks
Vx describes machines using capacity, links, and visibility, then checks programs against those specifications. The post discusses limits of flat-memory models and shows two capacity errors found on a laptop without a GPU.
Explicitly modeling memory spaces could help catch capacity and pointer-space errors in heterogeneous programs.
- CUDA and GPU programmingArticle
Xtrace: Intra-Kernel GPU Tracing via Binary-Level Splicing
Xtrace is a work on high-fidelity intra-kernel GPU tracing using binary-level instruction splicing. Its preview notes that tracing inserts probes into kernels to record execution data.
It may interest engineers profiling fused GPU kernels and evaluating tracing approaches.
- 1 month ago @wafer_ai
NVIDIA CUDA C++ Guide: Execution, Memory, and Correctness
NVIDIA’s CUDA Programming Guide introduction covers kernel launches, thread organization, memory management, synchronization, runtime initialization, error handling, and validating GPU results against a CPU implementation.
A concise overview of CUDA execution and memory concepts helps engineers build and debug GPU programs.
- CUDA and GPU programmingProject
auto-gpu-kernel 1.0 generates GPU kernels and harnesses
The author announces version 1.0 of auto-gpu-kernel, described as an autonomous kernel-generation meta-harness that evolves both the kernel and harness layer. Its GitHub page says it won the agent-only MLSys 2026 FlashInfer kernel generation contest's DSA track.
Engineers can inspect a project that generates GPU kernels and harnesses and competed in a kernel-generation contest.
- 2 months ago @QuixiAI
SlimServe fork enables PCIe P2P on GeForce
The author says they forked NVIDIA’s graphics drivers to enable PCIe peer-to-peer transfers on GeForce while optimizing SlimServe. They speculate it may also work on RTX Pro 6000, which they have not tested.
PCIe peer-to-peer support can matter when optimizing GPU serving, and the post points to a driver-level change.
FIBER Decouples Register Ownership from GPU Execution
The paper presents FIBER, a GPU architecture that decouples register ownership from parallel execution instances. It includes ISA extensions, lightweight microarchitectural enhancements, and a CUDA-compatible programming model.
It describes architectural and programming-model changes relevant to GPU and CUDA design.
hgpu.org
